AMD’s Helios: A Spec-Driven Assault on Nvidia’s Premium
AI-generated image · US National Wire
By launching a rack-scale platform that rivals Vera Rubin on paper, AMD is testing whether raw performance-per-dollar can dismantle Nvidia's market dominance.
The launch of Helios marks a strategic pivot for AMD. For years, the company has trailed Nvidia in the datacenter, typically releasing equivalent hardware a year after the competition. As The Register reported, AMD is breaking that cycle by launching Helios—its first true rack-scale AI compute platform—simultaneously with Nvidia’s Vera Rubin platform.
From a deals and valuation perspective, Helios is less about a product cycle and more about a direct challenge to the pricing power Nvidia enjoys. AMD is betting that theoretical spec superiority will translate into market share. The company estimates that Helios' peak performance will provide a 30 percent performance-per-dollar advantage over the competition.
On paper, the Helios system is designed to outmuscle the competition. The Register reports that the 72-GPU system is larger and faster than Nvidia’s Blackwell-based racks and the Vera Rubin system across nearly every metric. The Helios rack, utilizing an OCP Open Rack Wide form factor, measures 1.2 meters wide and 44OUs high—nearly double the size of Nvidia's NVL72.
AMD has leveraged this physical footprint to push technical limits. Compared to Vera Rubin, Helios offers 50 percent more scale-out bandwidth and HBM4. For AI training, AMD claims a performance lead of between 15 and 25 percent. While Vera Rubin's adaptive compression technology reportedly gives it a 25 percent lead over Helios at FP4 for inference workloads, Helios offers 15 percent higher peak FP4 FLOPS for applications that cannot utilize that compression.
The engine driving these gains is the Instinct MI455X GPU, built on AMD’s 5th-gen CDNA compute architecture. The Register describes the chip as a "silicon sandwich" featuring 24 chiplets, including eight compute dies fabricated on TSMC’s 2nm process and two 3nm fabric and cache dies (FCDs). To maximize AI-centric performance, AMD has entirely removed FP64 compute from the MI455X to prioritize datatypes like MXFP4 and MXFP8, though the company will offer a separate HPC-centric SKU for those requiring FP64.
AMD fellow Alan Smith, cited by The Register, notes that the MI455X replaces the previous "Infinity" cache with a larger shared L2 cache, resulting in a simplified data path and aggregate bandwidth that is 1.5x higher than the MI355X.
Beyond the chip, the Helios architecture seeks to commoditize the rack. While Nvidia relies on proprietary NVLink, AMD is utilizing Ultra Accelerator Link over Ethernet (UALoE). This allows the system to use merchant silicon; specifically, the Helios reference design employs 12 Broadcom Tomahawk 6 switch ASICs. Each compute blade in the system houses four MI455X GPUs, a Salina DPU, 12 Vulcano smartNICs, and a 96-core Venice Epyc CPU.
Ultimately, the success of Helios depends on whether hyperscalers and OEMs prioritize this reported performance-per-dollar lead over the established Nvidia ecosystem.